Design and Verification of a RISC-V Processor and System-on-Chip Using FPGA - Tarik Ibrahimović

Year
2025
Tags
RISC-V
Field-Programmable Gate Array
FPGA
processor design
system on chip
SoC
embedded systems
open-source hardware
hardware verification
SystemVerilog
computer architecture
microprocessors
digital design
IoT
hardware optimization
computer engineering
Dhrystone benchmark
hardware prototyping
BH Futures
Summary

This thesis presents the design and verification of a custom RISC-V processor implemented on Field-Programmable Gate Array (FPGA) technology. The project optimized hardware efficiency, achieved stable 50 MHz performance, and enabled software execution using SystemVerilog design and official benchmarks. It demonstrates how open-source hardware enables affordable, customizable computing solutions.